22 lines
391 B
Makefile
22 lines
391 B
Makefile
SRCS := $(wildcard src/*.c)
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OBJS := $(SRCS:src/%.c=build/%.o)
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DEPS := $(OBJS:%.o=%.d)
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WARNING_FLAGS := -Wall -Wextra
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INCLUDE_FLAGS := -I include
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CC := clang
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CFLAGS := $(WARNING_FLAGS) $(INCLUDE_FLAGS) -MMD -MP -std=c99
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kilo: $(OBJS)
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$(CC) $(CFLAGS) $^ -o $@
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$(OBJS): build/%.o: src/%.c
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@mkdir -p build
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$(CC) $(CFLAGS) -c $< -o $@
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clean:
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rm -rf build
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rm -f ./kilo
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-include $(DEPS)
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